By Gogul Balakrishnan, Thomas Reps (auth.), Byron Cook, Andreas Podelski (eds.)
ISBN-10: 3540697357
ISBN-13: 9783540697350
Read Online or Download Verification, Model Checking, and Abstract Interpretation: 8th International Conference, VMCAI 2007, Nice, France, January 14-16, 2007. Proceedings PDF
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Additional resources for Verification, Model Checking, and Abstract Interpretation: 8th International Conference, VMCAI 2007, Nice, France, January 14-16, 2007. Proceedings
Example text
Informally, a yield tree considers the term α as a finite ordered tree over the alphabet of atomic actions and the sequential and parallel compositions. The yield language of S, denoted L(S), is the set L(S) = yield(α). {[T (s0 )]}− → α Example 3. The yield language of the saga s0 = {[a ÷ b; c ÷ d e ÷ 0]} from example 2, consisting of six trees, is shown in Figure 2. Verifying Compensating Transactions σ σ; a σ; e c σ; σ; a σ; c d σ b a 37 σ; b e a b Λ e Fig. 2. 2 Tree Automata with One Memory Tree Automata.
G. Ramalingam, J. Field, and F. Tip. Aggregate structure identification and its application to program analysis. In POPL, 1999. T. Reps, G. Balakrishnan, and J. Lim. Intermediate representation recovery from low-level code. In PEPM, 2006. T. Reps, G. Balakrishnan, J. Lim, and T. Teitelbaum. A next-generation platform for analyzing executables. In APLAS, 2005. X. Rival. Abstract interpretation based certification of assembly code. In VMCAI, 2003. M. Sharir and A. Pnueli. Two approaches to interprocedural data flow analysis.
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Verification, Model Checking, and Abstract Interpretation: 8th International Conference, VMCAI 2007, Nice, France, January 14-16, 2007. Proceedings by Gogul Balakrishnan, Thomas Reps (auth.), Byron Cook, Andreas Podelski (eds.)
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